Anemômetro ultrassônico unidimensional baseado em correlação cruzada
This work describes the development of one axis wind speed measurement equipment applying error theory techniques, as the cross correlation, and ultrasound sensors. It can be used in tubes, where fluid speed knowledge is needed, climate stations, airports, in the moment of applying pesticides and in...
| Autor principal: | Silva, Tiago Polizer da |
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| Formato: | Dissertação |
| Idioma: | Português |
| Publicado em: |
Universidade Tecnológica Federal do Paraná
2017
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| Assuntos: | |
| Acesso em linha: |
http://repositorio.utfpr.edu.br/jspui/handle/1/1929 |
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| Resumo: |
This work describes the development of one axis wind speed measurement equipment applying error theory techniques, as the cross correlation, and ultrasound sensors. It can be used in tubes, where fluid speed knowledge is needed, climate stations, airports, in the moment of applying pesticides and in wind farms, where wind speed knowledge is necessary. The built prototype is a connected set of a de0-nano development board, a signal acquisition printed circuit board and two pairs of ultrasound sensors. The PCB also has circuits for ultrasound sensors exciting and PC communications to store the sampled signals. The error theory was discussed and the prototype's results were developed using probabilistic methods needed to verify the uncertainty. Inside de0-nano board FPGA chip, a system based in NIOS processor was developed and built through QSYS tool. There are some blocks described in VHDL for PCB interfacing. A small wind tunnel was built and a hand anemometer was acquired to validate the proposed system. Simulations were done in Microsoft Excel 2007 to compare the cross correlation given by the prototype and the theory. It is common DSPs and microprocessors inside this type of equipments to measure wind speed, but a system developed with a FPGA increases the processing speed due to parallelism. Blocks described in VHDL can be easily replicated inside the FPGA and there is a large collection of libraries, extensive literature and code examples for NIOS. Thereby there are small system/prototype developing times and there is an easy development of a System on Chip (SOC) of FPGA based systems, reducing the costs for a future commercial product. |
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